Re: ADG884 Threshold voltage on IN1/IN2
For the conditions that you have described, the part should switch correctly. The only other options that I think that could possibly be useful would be to upload the schematic or photo of the setup....
View ArticleRe: ADV7181C : How to a fine adjustment the Vsync output timing (SDP)
The ADV7181C only has the sync timing controls as defined in the manual section 8.15. All adjustments are based on LLC1 clock and since counter are 11 bits, you should be able to adjust the timing for...
View ArticleADUM 4160: Detection of VDD1 on Downstream Side and PIN functionality
Hello Forum, For an industrial application I am planning to use isolated USB. As MCU I use the Spansion 16FX (MB96F338USA) Micro. Therefore I’ve two questions. VBUS activity:+ The MCU provides USB...
View ArticleRe: AD9361_Initialization
Hi Dragos , I am getting the outputs correctly Thanks and RegardsBhaskar
View ArticleRe: ADG884 Threshold voltage on IN1/IN2
I'll have to create a subset of the (29 page!) schematic to post here. All boards tested show the same failure, so it seems unlikely to be a faulty component (unless it's the whole batch?) and as we...
View ArticleClik here to view.
Re: Matlab iio calls without Simulink
Hi Mike, There is indeed an issue with the server and things should be fixed by tomorrow. Regards,Andrei
View ArticleRe: Multiplexer output does not match the input
I attached the PDF file of the schematic...
View ArticleRe: AD9364 Tx monitor gain settings
Moved to Linux Software Drivers section for an answer on Tx Monitor driver.
View ArticleADE7878A pins connection
Hi everybody,I have a question about the connection of the ADE7878A pins. Is it mandatory to connect the NC pins (pin number 1, 10, 11, 21, 30, 31, 40) to GND? Or can I leave them floating without...
View ArticleRe: ADV7181D YPrPb input support ?
Are you using our evaluation board for the ADV7181D? -Matt
View ArticleRe: DAQ2 reference design no longer talks with AD9144
Reverting to the original 2014_R2 image available here: https://wiki.analog.com/resources/tools-software/linux-software/zynq_images and then not running adi_update_tools.sh allows the DAQ2 reference...
View ArticleRe: EVAL-ADAU1442 GPIO with 96kHz
Hi Gabriel, Your issue was posted during our company shutdown. Are you still having problems or was your issue resolved? If so, do you have a copy (or reduced version) of your project you can...
View ArticleRe: DAQ2 reference design no longer talks with AD9144
You have a pre-released board (revC). If you want to be able to use the latest software, please buy the RevD board from inventory. Thanks Charly
View ArticleRe: AD9144 also have scratchpad register?
The code you referenced simply includes some engineering registers that are used during the product development phase. These registers are not released for public use however and we do not recommend...
View ArticleClik here to view.
Re: HMC783LP6CE serial port write operation
Thanks for the information. I search for MPSSE mode in ftdi chips and I find that the maximum clock rate is 30 MHz, this is true? If it is, it is possible operate with the SCK frequency less then 50 MHz?
View ArticleRe: Second stage boot loader example for ADSP-21489
BTW, I was using EZ-BOARD 0.1, VisualDSP++5.1.1
View ArticleRe: Missing: SimRF Models of the AD9361 Agile RF Transceiver
Darren: Thanks for the question. The folks at ADI who helped MathWorks develop the model, and are most familiar with it, hang out on the software forums -- not on the transciever forums. That's why it...
View ArticleRe: AD9364 Tx monitor gain settings
Oleg: Sorry -- I will need to defer to Michael. It could be that no one has asked for that yet, so it's missing. It could be that the Rx gain setting controllers the Tx mon gain, when that input is...
View ArticleRe: Required Vivado, HDL and FPGA/Linux driver versions for FMCOMMS2/3 with...
You need to go to the web site to get "attachements" to messages. They don't come through on the email interface, to prevent as much spam as possible. - Robin
View Article