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Re: ADAS1000 CRC

Hi Jim_Jim,<Q1>My understanding, CRC calculation range from header to GPIO.Is it correct? Thats correct. <Q2>When I select 2kHz or 16kHz date rates, bit width is 32bit.Upper 8bit is address...

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Re: Eval AD7609 Artwork and Schematics

Hi, We are looking into this and we'll get back to you soon.  Regards,Jonathan

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Re: Programming multiple ADuC7xxx Evaluation Boards

Those switches only connect on the analog side so that shouldn't affect the ability to program the part. I have 2 theories based on some of the information you provided. 1. seeing as for 1 of the...

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Re: ADV7623 Resister setting value.

Hi Wook, Could you please let us know the software driver version that you have been using? Best Regards,Jeyasudha.M

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Re: ADuC7129 I2C

The I2C block on the ADuC7129 is the same as on the ADuC702x (note that ADuC7023 is not part of the ADuC702x family), so AN-895 does apply to the ADuC7129. Yes the information regarding number of bytes...

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Re: External clock for ADIS 16448

Hello vikas243, You can control the output data rate through the decimation filter or through the external clock option. Both options are covered in the SMPL_PRD register, which is covered on page 17...

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Re: I2C serial programming error on I2CWSD_7023

The clock stays low on my board as well after failing to communicate (I force a failure by not being in download mdoe). This isn't a problem.What do you mean the data value doesn't make sense? What is...

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Re: problem with my ADIS16448 data output

OK. Just to make sure we are clear, in the picture that I posted, Ax = ~0g, Ay = ~0g, AZ = +1g. I hope that that helps. Best,NevadaMark

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Re: AD9643 Test Mode

Hi Mel, A few more comments here from an ADC perspective.  The test patterns are not synchronized between the two channels, however, with that being said, when writing the test pattern mode if you have...

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ADAU1361, PLL and Fs=32kHz

Hi My MCLK=27MHz. I am need to get Fs=32kHz(frequency on pin LRCLK, p.43 Figure 57..59). That mean - it’s need PLL in fraction mode. DataSheet state:1. The PLL output clock rate is always 1024 × Fs...

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Arbitrary Waveform Generator

HelloI want to generate an arbitrary waveform signal. I mean that I want to be able to change all three signal control parameters; i.e. Amplitude, Frequency, and Phase. I need the best IC with a DDS...

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Problems with ADSP21262 JTAG interface and Building

My configurations are: Visual DSP++ 5.0, ADSP-21262SBBC-150 and ADZS-HPUSB-ICE. The target board design has been confirmed with ADSP21262 EZ-KIT-Lite design reference and the appendix A in...

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Re: AD8021 distortion

Hi Emman and Harry, Sorry for taking so long getting back to you. I have decided to buy a few of the evaluation boards and test a few things out.  So you guys are right, the load is causing the opamp...

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Re: High speed op amp with output current limiting

There's plenty on offer from Analog Devices, so I suggest you look at the AD8010, AD8009 and AD8007. Most modern parts are short circuit protected, but you'll need to check the datasheets.

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Re: ADV7626 adaptive equalizer block

Tx Sz.O,  The customer has developed their own EQ chip and believe that it is far superior than anything in the market.  Sent from my BlackBerry 10 smartphone on the Rogers network.From: Sz.OSent:...

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AD9361 Evaluation platform

Hi,I purchased several set of AD-FMCOMMS2-EBZ and the vendor gave me a platform that must run on Xilinx ZC706 boards. The platform also includes some API drivers and a GUI inferface for testing AD9361....

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Re: ADFMCOMMS-1 ZedBoard Reference Design DMA Configuration

Hi Dragos, Thanks very much for pointing out the update.  We basically aim to implement a double buffer so that we can transfer a second block from PL while we are processing the first block in the PS...

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Re: AD9361 Evaluation platform

Moved to FPGA Reference Designs.

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Re: Calibration Without Weight

Hi DC, Apologies for the delayed response. From the ADC point of view, the ADC needs a voltage which corresponds to the zero scale value when system offset calibrations are being performed. I do not...

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Re: Arbitrary Waveform Generator

Hi,Thank you so much for your reply. I wonder whether I can ignore RAM control when I want to generate completely arbitrary waveform signals. Which mode do you mean is the best among the following...

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