Hello vikas243,
You can control the output data rate through the decimation filter or through the external clock option. Both options are covered in the SMPL_PRD register, which is covered on page 17 of the ADIS16448 datasheet:
http://www.analog.com/static/imported-files/data_sheets/ADIS16448.pdf#Page=17
The timing specifications for the clock are on page 5:http://www.analog.com/static/imported-files/data_sheets/ADIS16448.pdf#Page=05 http://www.analog.com/static/imported-files/data_sheets/ADIS16448.pdf#Page=05
Good luck! We look forward to hearing how things progress for you.
Best,
NevadaMark