This issue is being discussed in Output sawtooth wave to AD9144.
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Re: AD-FMCDAQ2-EBZ + ZC-706 dev kit: unexpected glitch when generating a sawtooth waveform
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Re: XCVR lane configuration for ADRV9371-Tx
Hi Murali,
Do you want to use 2 tx channels(not possible with 2 JESD lanes) or just 1.
I'm still experimenting with the tx 2 jesd lanes setup.
Andrei
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Re: BF706 Fir filter codec problem？
Hello,
Firstly, were you able to run the example code available in the BSP correctly? If not, please go through the solution below.
This solution can be used for avoiding the kind of noise issue found on ADSP-BF706 Ez-kit mini.
The ADAU1761 codec driver when using SPI mode calls adi_sport_ConfigClock() with the bFallingEdge parameter being incorrectly true. CCES 2.4.0 corrected a bug whereby the bFallingEdge parameter was not being handled correctly, and this triggered the problems with the ADAU1761 driver examples you have encountered.
We have a patch for you to apply to adi_adau1761.c. This source is part of the BF706 BSP and will be included with the example projects in system > BF706_EZ-Kit_MINI > drivers > codec > adau1761. For the two calls of adi_sport_ConfigClock() replace the forth parameter (true,) in each with:
#if __CCESVERSION__ >= 0x02040000
false, /* CCES-11151 fixed */
#else
true, /* passing true compensates for CCES-11151 */
#endif
In addition to the above workaround, slight modification was done on your FIR code. Try using cfir_init library function instead of fir_init and check if you can get through this.
Hope this helps.
Best Regards,
Jithul
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Re: Can I parallel SYSREF clock from AD9371EVM to my FPGA and DSP?
Q1. No
Q2. Yes, depends on BBP
Q3. Yes will be within 20 Usec.
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Re: SC-589 Stack
Hello,
Can you please confirm if are you referring to the LWIP stack? What is the platform you are migrating from and what is the application?
Best Regards
Jithul
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Re: USBStreamer Digital Audio Board --> ADAU1452
Hello Ken,
Thank you for the quick response. I am using an amplifier which has an ADAU1452 on it. I was able to configure the ADAU1452 as a BCLK and LRCLK slave to the USBStreamer. My next steps are to connect the MCLK output from my USBStreamer device (24.576 MHz) to the XTALIN/MCLK input on the ADAU1452.
I am currently using ASRCs for all 8 channels but it still sounds distorted.
Thank you,
Chelsea
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Re: Synchronize two AD9914 for I and Q Generation
Yes, that is correct.
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Re: What are the EEPROM ID values for LT Eval Boards?
The correct string should be:
LTC2320-16,D2374,DC2395A-A,YGG801T,CMOS,--------
It looks like the string is corrupted. I would suggest returning the board to the place of purchase and let them know the board is nonfunctional. You should be able to exchange it for a functional board.
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Re: ADAR1000-EVALZ SPI connection
Oh OK - Sorry, I thought you were trying to confirm your SPI writes with actual measurement done on the device, not just a SPI reads.
I'm wondering if your reset write to Reg 0x00 is cancelling out the SDO ACTIVE bits (B3:B4)? When you perform a reset, it should go back to the default 3-wire SPI setting.
Try just writing just 0x18 to Reg 0x00 and then try to read out of Reg 0x2C. That should activate the SDO pin and thus you'll be able to use it as a 4-wire SPI.
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Differential video transmission with ADA4433-1 and ADA4830-1
Hello,
Thanks for providing the spice model of both ADA4433-1 and the ADA4830(-1).
I'm trying to design a DC coupled differential transmission system using the ADA4433-1 and the ADA4830.
The overall gain from input (ADA4433-1) to output (ADA4830) should ideally be 1.
It is intended for composite video with a voltage range from 0 to 1V.
I tried to make this truly DC coupled by setting both -In of the ADA4433-1 and the Vref in of the ADA4830-1 to 0.5V.
The line is very short and only the drive resistors of 37.5Ohms are fitted. R2 is omitted in order to not lose signal amplitude.
In general, the simulated circuit works well. However, the output saturates just below 0.1V with a 150Ohm load to GND and a 3.3V supply.
According to the datasheet, it should rather be 0.01V (Output Voltage Swing 0.01V to 3.08V @ 3.3V supply)
Any chance this combination of ADA4433-1 and the ADA4830(-1) would work as intended?
An alternative would be to use an additional amplifier at the ADA4830's output for proper level shifting, and potentially some gain. But we would be very happy to get away without this added circuitry.
The LTspice simulation .asc file is attached.
Thanks for having a look at this.
Kind regards,
Ra
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Re: ADALM-PLUTO not detected on Windows 10
Also have you tried rebooting?
-Travis
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Re: Failed to build v0.29
I’ll update the docs tomorrow. Feel free to use the old toolchain. There shouldn’t be any problems.
-Michael
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Re: FMCOMMS5 Unable to get phase coherent TX and RX signals for beamforming
1. All TX and RX channels between chips have their own gain settings so it will be hard to make any assumption on the alignment of the TX signal by looking across chips. If you want to test TX alignment between chips, feed TX signals from different chips into different RX channels on the same chip. You may want to do this first from the same source with a splitter and measure and phase difference that may exist because of trace mismatch.
2. MCS only provides alignment of the ADCs/DACs and onward towards the digital interfaces. So anything in the analog domain before the ADC or DAC can cause phase differences, like the mixer, gain stages, and LPF. With regards to digital loopback, if there is any phases applied differently between the channels it will make these signals offset. There will be no correlation between the BIST loopback on all of the channels and the loopback using SMA cables.
-Travis
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Re: LTC1759: Adjust current at run time
Hello,
Reasonably simple, maybe. You could switch in a parallel sense resistor for the high-current case using a FET. The complication there is that the RDSon of the FET will be in the same order of magnitude as the sense resistor, so you'll have to take that into account. Your best bet is to use a FET with a very low RDSon and account for the temperature variation. Luckily, the LTC1759 uses relatively high sense resistor values, so a FET with a typical RDSon of, say, 5mOhms could result in a good solution.
You want to have a low RDSon here regardless since all of your power will pass through this path.
Think that might work for you?
Regards,
Zack
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Re: ADXL362 - MISO does not respond
Can you run the ADXL362 under 3.0V and check if MISO works OR implement a level shifter in between since your slave and master is operating at different voltage levels. Directly connecting the slave to 2V and master to 3V will trigger the ESD protection but is also likely to break the part.
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Re: Why LTC3805-5 restarts again and again?
The restart may happen due to noise on OC pin or due to under voltage lockout on Vcc pin.
Increasing the 5V input to 5.5V-6V level can rule out the UVLO on Vcc pin.
Adding a decoupling cap close to OC and GND pins will indicate if the problem is due to noise on OC pin.
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Re: PCB of ADP5054 EVAL
Could you please leave your email address, then we can send you ADP5054 PCB file?
- Justin
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Re: ADXL362 - MISO does not respond
So the 2V for the slave is provided from the master chip which has a level shifter already implemented in it. I also tried the case of giving a voltage >2V to ADXL362 thinking that the initial voltage was too low , so I still put in a level shifter to 2.5 V and the MISO line still does the same waveform as in the above attachment.
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Upgrading Linaro distribution
I'm currently using a Zedboard with the FMCOMMS4 running Linaro 14.04 (latest distribution available from AD). How would I upgrade to Linaro 16.04 or another Ubuntu distribution version 16.04 or later? Running the built-in "do-release-upgrade" command produces a lot of errors and I cannot find a rootfs to install on the SD card.
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Re: AD7771 correct -3dB BW?
I calculated by multiplying response of sinc1 @ 128kHz w/ a sinc4 @ 32kHz.
I now see the figure/equation you refer to, however, this is just a linear approximation. Is there a more exact way to get the response so that I can employ a compensating FIR filter to flatten response out a bit further?
-Dan
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