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Re: AD9361 for WiFi (TDD) application

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The device supports FDD independent operation with Tx and Rx synthesizers set to the same frequency.

 

Use FDD Independent Control Mode and turn on Tx prior to when the subframe boundary
occurs.  This will very likely overlap Rx and Tx so power supply layout
etc. becomes even more important than usual.

Use real-time SPI writes.  Put the AD9361 into the normal FDD mode and then
use real-time writes to power on/off the Tx LO.  The DAC stays on.
The writes are to 0x051[D4].  Power up time for the LO is approximately 160ns.

 

What is the timing that you need?


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