Hi Donald,
I apologize for letting this slip through the cracks. I completely missed that you'd replied several months back. In the signal chain you included it is possible that the signal level could go above the absolute maximum for the AD9268. The safest approach would be to implement an AGC loop to bound the input signal conditions...but I imagine that is not your preference. I can offer that the absolute maximum input level limit is set by using a DC input signal such that the energy (power dissipated) would be continuous and likely greater than in an event where the signal is instantaneously higher than the maximum limit. As I mentioned before, you can place clamping components on the front end but it will likely result in decreased SFDR performance.
Again, I apologize for the belated reply.
Regards,
Jonathan