Hello Wayne,
Your PLL applicaiton when viewed using our ADI simPLL software looks fine...this would indicate that your loop filter components and register write values are fine...
I have 2 comments to take on the schematic.
1) Can you ensure that the L1 and L2 inductors are mounted at right angles and as close to the pin of the ADF4360-8 as feasible
2) Each supply pin ...AVDD, DVDD and VVCO should have seperate decoupling caps...see the eval board schematic for details...
http://www.analog.com/static/imported-files/user_guides/UG-105.pdf
I hope tihs helps.
Regards,
Brigidf.